The IEEE Council on EDA and the IEEE Design Automation Committee have jointly organized a workshop on Parallel Programming for EDA to be held on Thursday 11/11/2010 as part of ICCAD in San Jose.
The workshop will bring together experts from the design automation and parallel programming community to discuss the timely issue of parallelization of EDA tools. This challenging topic has received significant attention from EDA vendors, industry CAD groups and the design community. Design complexity is exponentially increasing driven by density scaling and 3D integration – leading to a dramatic growth of the verification needs and optimization opportunities. Furthermore, future technology nodes are becoming more difficult to develop due to lithographic challenges and increase in variability. In order to keep up with these trends, the computational requirements of design tools are rapidly growing, which translates into the need of more compute cycles. In the past, the increasing computing demand was addressed by Moore’s Law, which offered an exponential growth of single thread performance. However, with the demise of frequency scaling, effective solutions must now leverage multi-core CPUs, distributed computing architectures or special co-processors. Efficient parallelization of EDA applications is now a must for any modern EDA tool.
This workshop provides a forum for leading experts from the CAD, parallel programming and high-performance computing community to present their latest research, exchange ideas, and conduct brainstorming. Computing platforms are central to parallel programming, so we have invited luminaries from HPC centers and Cloud Computing to explain how EDA applications might be deployed there. Circuit simulation and place&route are core algorithms in design automation – we have two practicing experts to share their insights on parallelization of these algorithms. Parallel programming is intrinsically a difficult proposition and most CAD developers are new to this arena. Several parallel programming evangelists will be talking about parallel programming paradigms and tools that enhance the productivity of the code developers. We round up the workshop with a panel of CAD development architects, who have parallelized key EDA applications, to share their success stories.
The goal of ParCAD 2010 is to educate the participants on the various challenges of parallelization, give them concrete advice on tools and methods for parallel code development and offer insight into new cross-disciplinary solutions that target the characteristics of EDA applications.
ParCAD Preliminary Program - Thursday November 11, 2010:
|9:00 - 10:00am|| Keynote
“Preparing for Parallel Computing: Lessons from the Failed Revolution of the 80's”
Prof. Arvind, Massachusetts Institute of Technology
|10:00 - 10:15am||Break|
|10:15 - 11:15am||Computing Platforms
“Unstructured Mesh Adaptive Simulations on Massively Parallel Computers”
Mark Shephard, CCNI, Rensselaer Polytechnic Institute (30min)
“Architecting for Amazon Web Services”
Jinesh Varia, Amazon.com, Inc. (30min)
|11:15am - 12:15pm||Applications
“Practical Parallelism: Tales from the Trenches of Commercial Place and Route Tools”
Adrian Ludwin, Altera Corp. (30min)
“Developing Software for Large-Scale Circuit Simulation Using Trilinos”
Heidi Thornquist, Sandia National Labs (30min)
|12:15 - 1:30pm||Lunch|
|1:30 - 2:30||Tools for Parallel Programming I
“Intel’s Profiling and Debugging Tools”
Vasanth Tovinkere, Intel Corp. (1h)
|2:30 - 3:00pm||Break|
|3:00 - 4:30pm||Tools for Parallel Programming II
“Design Patterns and Parallel Programming Languages: Practical Advice for Real Programmers”
Tim Mattson, Intel Corp. (45min)
“Use Patterns to Understand, Architect, and Parallelize CAD Applications”
Bor-Yiing Su, Univ. of California, Berkeley (45min)
|4:30 - 5:00pm||Break|
|5:00 - 6:30pm||Panel
“Practical Experience with Programming Parallel EDA Applications”
Moderator: Patrick Madden, State Univ. of New York, Binghamton
Jay Adams, Synopsys, Inc.
John Croix, Cadence Design Systems, Inc.
Patrick Groeneveld, Magma Design Automation, Inc.
Duaine Pryorgot, Mentor Graphics Corp.
Uli Finkler, IBM Corp.
Guy Maor, Extreme DA